IEEE

FPGA IP Core for DC Motor Control With Adaptive Neural Network PID Tuning, and High-Resolution Encoder Interface

Abstract: Traditional proportional integral derivative (PID) falls short for precise control of DC motor speed under changing conditions. This paper presents a novel FPGA based IP (intellectual ...
IEEE

A Survey of System Architectures and Techniques for FPGA Virtualization

Abstract: FPGA accelerators are gaining increasing attention in both cloud and edge computing because of their hardware flexibility, high computational throughput, and low power consumption. However, ...